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ir2011 ( s)pbf 1 www.irf.com ? 201 5 international rectifier april 14, 2015 high and low side driver ordering information features ? floating channel designed for bootstrap operation ? fully operational to 2 00v ? tolerant to negative transient voltage , d v/dt immune ? gate drive supply range from 10 to 20v ? in dependent low and high side channels ? input logic hin/lin active high ? undervoltage lockout for both channels ? 3.3v and 5v logic compatible ? cmos schmitt - triggered inputs with pull - down ? matched propagation delay for both channels description the ir2011 is a high power, high speed power mosfet driver with independent high and low side referen ced output channels. logic inputs are compatible with standard cmos or lsttl output, down to 3.0v logic. the output drivers feature a high pulse current buffer stage desig ned for minimum driver cross - conduction. propagation delays are matched to simplify use in high frequency applications. the floating channel can be used to drive an n - channel power mosfet in the high side configuration which operates up to 200 volts. propr ietary hvic and latch immune cmos technologies enable ruggedized monolithic construction. applications ? converters ? dc motor drive product summary v offset (max) 2 00v i o +/ - (typ) 1 .0a / 1 .0 a v out 10 C 20v t on/off (typ ) delay matching (max) 8 0 ns & 60 ns 20 ns package options 8 - lead pdip 8 - lead soic base part number package type standard pack orderable part number form quantity ir2011 pbf pdip 8 tube 5 0 ir2011 pbf ir 2011 spbf so 8n t ube 9 5 ir 2011 spbf ir 2011 spbf so8n tape and reel 25 00 ir 2011 strpbf
ir 2011 (s)pbf 2 www.irf.com ? 201 5 international rectifier april 14, 2015 typical connection diagram (refer to lead assignments for correct configuration.) this diagram shows e lectrical connections only. please refer to our application notes and design tips for proper circuit board layout
ir 2011 (s)pbf 3 www.irf.com ? 201 5 international rectifier april 14, 2015 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param eters are absolute voltages referenced to com . the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. symbol definition min. max. units v b high side floating supply voltage - 0.3 225 v v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc low side fixed supply voltage - 0.3 25 v lo low side output voltage - 0.3 v cc + 0.3 v in logic input voltage ( hin, lin) - 0.3 v cc + 0.3 dv s /dt allowable offset supply voltage transient 50 v/ns p d package power dissipation @ t a +25c 8 - lead pdip 1. 0 w 8 - lead soic 0.625 rth ja thermal resistance, junction to ambient 8 - lead pdip 125 c/w 8 - le ad soic 200 t j junction temperature 150 c t s storage temperature - 55 150 t l lead temperature (soldering, 10 seconds) 300 recommended operating conditions f or proper operation the d evice should be used within the recommended c onditions. the v s and com offset rating s are tested with all supplies biased at 15v differential. symbol definition min. max. units v b high side floating supply absolute voltage v s + 10 v s + 20 v v s high side floating supply offset volt age ? 2 00 v ho high side floating output voltage v s v b v cc low side fixed supply voltage 10 20 v lo low side output voltage 0 v cc v in logic input voltage (hin, lin ) com 5.5 t a ambient temperature - 40 125 c ? logic operation al for v s of - 4 to +2 00v. logic state held for v s of - 4 v to - v bs .
ir 2011 (s)pbf 4 www.irf.com ? 201 5 international rectifier april 14, 2015 dynamic electrical characteristics v bias (v cc , v bs ) = 15v, c l = 1000 pf and t a = 25c unless otherwise specified. figure 1 shows the timing definitions. symbol definition min. typ . max. units test conditions t on turn - on propagation delay 80 ns v s = 0v t off turn - off propagation delay 75 v s = 200v t r turn - on rise time 35 50 t f turn - off fall time 20 35 dm1 turn - on delay matching | t on (h) - t on (l ) | 20 dm2 turn - off delay matching | t off (h) - t off (l) | 20 static electrical characteristics v bias (v cc , v b s ) = 15v and t a = 25c unless otherwise specified. the v in , v th and i in parameters are referenced to com and are applicable to all l ogic input leads: hin and lin . the v o and i o parameters are referenced to com and are applicable to the respective output leads: ho o r lo . symbol definition min. typ. max. units test conditions v ih logic 1 input voltage 2.2 v v cc = 10v C 20v v il logic 0 input voltage 0.7 v oh high level output voltage, v bias - v o 2 . 0 i o = 0a v ol low level output voltage, v o 0.2 i o = 20ma i lk offset supply leakage current 50 a v b = v s = 2 00v i qbs quiescent v bs supply current 90 210 v in = 0v or 3.3v i qcc quiescent v cc supply current 140 230 i in+ logic 1 input bias current 7 .0 20 v in = 3.3v i in - logic 0 input bias current 1.0 v in = 0v v bsuv+ v b s supply undervoltage positive going threshold 8.2 9.0 9.8 v v bsuv - v bs supply undervoltage negative going threshold 7.4 8.2 9.0 v ccuv+ v cc supply undervoltage positive going threshold 8.2 9.0 9.8 v ccuv - v cc supply undervoltage negative going t hreshold 7.4 8.2 9.0 i o+ output high short circuit pulsed current 1.0 a v o = 0v, pw 10 s i o - output low short circuit pulsed current 1.0 v o = 15v pw 10 s
ir 2011 (s)pbf 5 www.irf.com ? 201 5 international rectifier april 14, 2015 functional block diagram
ir 2011 (s)pbf 6 www.irf.com ? 201 5 international rectifier april 14, 2015 lead definitions symbol description h in logic input for high side gate driver outputs (ho), i n phase lin logic input for low side gate driver ou tputs (l o), in phase v b high side floating supply ho high side gate drive output v s high side floating supply return v cc low side supply lo low side gate drive output com low side retur n lead assignments 8 - lead pdip 8 - lead soic
ir 2011 (s)pbf 7 www.irf.com ? 201 5 international rectifier april 14, 2015 application information and additional details fig ure 1. timing diagram
ir 2011 (s)pbf 8 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 2a. turn - on propagation delay vs. temperature figure 2b. turn - on propagation delay vs. supply voltage figure 3a. turn - off propagation delay vs. temperature figure 3b. turn - off propagation delay vs. supply voltage figure 4a. turn - on rise time vs. temperature figure 4b. turn - on rise time vs. supply voltage
ir 2011 (s)pbf 9 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 5a. turn - off fall time vs. temperature figure 5b. turn - off fall time vs. supply voltage figure 6a. turn - on delay matchi ng vs. temperature figure 6b. turn - on delay matching time vs. supply voltage figure 7a . turn - off delay matching time vs. temperature figure 7b. turn - off delay matching time vs. supply voltage
ir 2011 (s)pbf 10 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 8a. logic 1 input voltage vs. temperatur e figure 8b. logic 1 input voltage vs. supply voltage figure 9a. logic 0 input voltage vs. temperature figure 9b. logic 0 input voltage vs. supply voltage figure 10a. high level output vs. temperature figure 10b. high level output vs . supply voltage
ir 2011 (s)pbf 11 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 11a. low level output vs. temperature figure 11b. low level output vs. supply voltage figure 12a. offset supply leakage current vs. temperature figure 12b. offset supply leakage current vs. supply voltage figure 13a. v bs supply current vs. temperature figure 13b. v bs supply current vs. supply voltage
ir 2011 (s)pbf 12 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 14a. v cc supply current vs. temperature figure 14b. v cc supply current vs. v cc supply voltage figure 15a. logic 1 input bias current vs. tem perature figure 15 b. logic 1 input bias current vs. supply voltage figure 16a. logic 0 input bias current vs. temperature figure 16b. logic 0 input bias current vs. supply voltage
ir 2011 (s)pbf 13 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 17. v cc and v bs undervoltage threshold (+) vs. te mperature figure 18. v cc and v bs undervoltage threshold ( - ) vs. temperature figure 19a. output source current vs. temperature figure 19b. output source current vs. supply voltage figure 20a. output sink current vs. temperature figure 20b. output sink currnt vs. supply voltage
ir 2011 (s)pbf 14 www.irf.com ? 201 5 international rectifier april 14, 2015 figure 21. maximum v s negative offset vs. v bs floating supply voltage
ir 2011 (s)pbf 15 www.irf.com ? 201 5 international rectifier april 14, 2015 package details
ir 2011 (s)pbf 16 www.irf.com ? 201 5 international rectifier april 14, 2015 tape and reel details carrier tape dimension for 8soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5.45 5.55 0.214 0.218 e 6.30 6.50 0.248 0.255 f 5.10 5.30 0.200 0.208 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 metric imperial metric imperial e f a c d g a b h note : controlling dimension in mm loaded tape feed direction a h f e g d b c
ir 2011 (s)pbf 17 www.irf.com ? 201 5 international rectifier april 14, 2015 part marking information i r x x x x x i r l o g o y w w ? p a r t n u m b e r d a t e c o d e p i n 1 i d e n t i f i e r l o t c o d e ( p r o d m o d e C 4 d i g i t s p n c o d e ) a s s e m b l y s i t e c o d e p e r s c o p 2 0 0 - 0 0 2 ? x x x x m a r k i n g c o d e l e a d f r e e r e l e a s e d n o n - l e a d f r e e r e l e a s e d ? p
ir 2011 (s)pbf 18 www.irf.com ? 201 5 international rectifier april 14, 2015 qualification information ? qualification level industrial ?? (per jedec jesd 47 ) comments: this family of ics has passed jedecs industrial qualification. irs consumer qualification level is granted by extension of the higher i ndustrial level. moisture sensitivity level 8 - lead soic msl 2 ??? (per ipc/jedec j - std - 020) rohs compliant yes ? qualification standards can be found at international rectifiers web site http://www.irf.com/ ?? highe r qualification ratings may be available should the user have such requirements. please contact your international rectifier sales representative for further information. ??? higher msl ratings may be available for the specific package types listed here. please contact your international rectifier sales representative for further information. the information provided in this document is believed to be accurate and reliable. however, international rectifier assumes n o responsibi lity for the consequences of the use of this information. international rectifier assumes no responsibility for any infringement of paten ts or of other rights of third parties which may result from the use of this information. no license is granted by implication or oth erwise under any patent or patent rights of international rectifier. the specifications mentioned in this document are su bject to change without notice. this document supersedes and replaces all information previously supplied. for technical support, please contact irs technical assistance center world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252 - 7105

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